Inter-signal proximity verification in an integrated circuit
US6807657B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 19, 2002 |
| Grant date | Oct 19, 2004 |
| Priority date | — |
| Expiry date | Aug 5, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/398
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one aspect, techniques are disclosed for identifying and notifying a circuit designer of signal traces in an integrated circuit design that are closer to each other than a proximity threshold. It is desirable that signal traces be separated from each other by at least the proximity threshold to reduce inter-signal crosstalk to an acceptable level. Such notification may occur either dynamically (while the circuit designer is designing the circuit) or through a report generated after the circuit design has been generated. In another aspect, techniques are disclosed for identifying and notifying the circuit designer of the signal traces that are closest to a reference signal trace. Such notification may provide the circuit designer with feedback about regions in the circuit design which are congested and which may therefore produce an unacceptable level of crosstalk.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.