Microsystem package structure
US6809852B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 24, 2003 |
| Grant date | Oct 26, 2004 |
| Priority date | — |
| Expiry date | Jun 24, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/00014
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
The present invention relates to a package structure for a microsystem, comprising a substrate, a chip, an adhesive structure, a carrying substrate, a micro-mechanism, a plurality of wires, an annular body and a transparent plate. The chip is placed on the substrate. The annular adhesive structure having an opening is placed on the chip. The carrying substrate is placed on the adhesive structure, thus forming an interspace between the chip, the adhesive structure and the carrying substrate. The pressure inside the interspace can be balanced with the pressure outside the interspace through the opening. The micro-mechanism is disposed on the carrying substrate. The annular body is formed on the substrate and the transparent plate is attached on the annular body, thus forming a closed chamber between the substrate, the annular body and the transparent plate. The chip, the micro-mechanism, the adhesive structure, the carrying substrate and the wires are disposed within the closed chamber.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.