Non-volatile semiconductor memory device having a memory cell which stably retains information
US6813188B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 31, 2002 |
| Grant date | Nov 2, 2004 |
| Priority date | — |
| Expiry date | Dec 31, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0475
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a non-volatile semiconductor memory device, three word line voltage circuits generating different voltages are provided. A voltage selecting circuit pre-selecting one voltage from the three different voltages is provided. In an ONO film in which lower silicon oxide film is formed thinner than upper silicon oxide film, word line voltage generating circuit is pre-selected, and in a write operation a voltage of 7V lower than the normal voltage of 9V is applied. In ONO film in which upper silicon oxide film is formed thinner than lower silicon oxide film, word line voltage generating circuit is pre-selected, and in a write operation a voltage of 11V higher than the normal voltage of 9V is applied. Thus, the non-volatile semiconductor memory device capable of retaining charges as information stably is attained.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.