Semiconductor memory device requiring refresh operation
US6813210B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 21, 2002 |
| Grant date | Nov 2, 2004 |
| Priority date | — |
| Expiry date | Feb 8, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/406
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The semiconductor memory device includes a refresh timer for determining a refresh cycle of self-refresh operation. The refresh timer includes a voltage regulator, a ring oscillator and a counter. The voltage regulator generates a bias voltage having positive temperature characteristics. The ring oscillator varies an oscillation cycle of a pulse signal according to the bias voltage. The counter counts a prescribed number of pulse signals and generates a refresh signal for executing refresh operation. The semiconductor memory device thus varies the refresh cycle according to a temperature change, and executes refresh operation with an appropriate refresh cycle.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.