Stacked gate flash memory device and method of fabricating the same
US6815290B2 · kind B2 · utility
11Cited by
7References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 10, 2003 |
| Grant date | Nov 9, 2004 |
| Priority date | — |
| Expiry date | Jun 10, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6894
Abstract
A stacked gate flash memory device and method of fabricating the same. A cell of the stacked gate flash memory device in accordance with the invention is disposed in a cell trench within a substrate and source and drain regions are formed in the same substrate side of the adjacent isolation trenches. Thus, the stacked gate flash memory device of the invention can achieve high integration of memory cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.