Re-encoding illegal OP codes into a single illegal OP code to accommodate the extra bits associated with pre-decoded instructions
US6816962B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 25, 2002 |
| Grant date | Nov 9, 2004 |
| Priority date | — |
| Expiry date | Apr 20, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30181
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system for utilizing bits in a collection of illegal op codes in order to enable pre-decoded instructions to be stored in an instruction cache without increasing the number of bits required to represent the pre-decoded instructions. Upon fetching an instruction from memory, the op code is examined for membership in a collection of illegal op codes. If the instruction op code is a member of this collection, the instruction may be re-encoded to use a different, common illegal op code. If the instruction op code is not a member of the collection of illegal op codes, but is instead an instruction to be stored in the instruction cache in a pre-decoded format, the additional pre-decoded information may be stored in the instruction encoding by utilizing the portion of the op code space which has been vacated by the re-encoding of the illegal op codes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.