Structure and method for mounting a small sample in an opening in a larger substrate
US6821812B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 13, 2002 |
| Grant date | Nov 23, 2004 |
| Priority date | — |
| Expiry date | Dec 13, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19043
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process and structure for mounting a small sample in an opening in a larger substrate by using an intermediate size structure, wherein the small sample is mounted in a small opening in the intermediate size structure which then, in turn, is mounted in an intermediate size opening in the large substrate. As a result, the formation of gaps around the edge of the sample may be voided. The process is carried out by first mounting the test sample in a opening formed with tapered sidewalls through a die with the upper surface of the sample directly abutting the edges of the smallest portion of the tapered opening in the die, The die is then mounted in an opening with tapered sidewalls in a test wafer. The opening in the die is sized to equal, at the smallest end of the tapered sidewalls of the opening, the width and length of the square sample. By placing down on a common flat surface abutting one another, both the surface of interest of the sample, and the surface of the die adjacent the smallest portion of the tapered sidewall opening, the die and the sample may be secured to one another by an adhesive introduced into the gap on the respective rear sides of the die and sample. Virtua…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.