Method and system for controlling an electrical property of a field effect transistor
US6821859B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 30, 2002 |
| Grant date | Nov 23, 2004 |
| Priority date | — |
| Expiry date | Oct 28, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/0227
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods and systems are disclosed that allow an adjustment of an electrical property of a field effect transistor during the fabrication of the device. A manufacturing process downstream of the gate electrode formation step is controlled in response to the measured gate length such that a deviation of the measured gate length is, at least partially, compensated by a subsequent process step in order to maintain the electrical property of the completed field effect transistor within specified tolerances. In one illustrative embodiment, the effective gate length that is defined as the lateral distance of lightly doped regions is controlled so as to substantially maintain it. Moreover, a controller is disclosed that allows the manufacturing of a field effect transistor on a run-to-run basis by which variations of the gate length are at least partially compensated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.