Plasma etch resistant coating and process
US6825051B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 17, 2002 |
| Grant date | Nov 30, 2004 |
| Priority date | — |
| Expiry date | Jun 25, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/67069
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
A protective coating is provided herein and methods of using the protective coating for susceptors used in semiconductor deposition chambers are described. In the preferred embodiments, CVD chamber equipment, such as a susceptor, is protected from plasma etch cleaning. Prior to CVD of silicon nitride, the chamber equipment is first coated with an emissivity-stabilizing layer, such as silicon nitride. This layer is then superficially oxidized. After repeated cycles of deposited silicon nitride upon different substrates in sequence, the chamber is emptied of wafers and a plasma cleaning process is conducted. Plasma cleaning is preferably selective against the silicon oxynitride protective coating. After the plasma cleaning process, the emissivity-stabilizing layer is reapplied, oxidized, and a plurality of deposition cycles can commence again.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.