Test key and method for validating the position of a word line overlaying a trench capacitor in DRAMS
US6825053B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 23, 2003 |
| Grant date | Nov 30, 2004 |
| Priority date | — |
| Expiry date | Jun 23, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/488
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A test key for validating the position of a word line structure overlaying a deep trench capacitor of a DRAM. The test key is deposited in the scribe line region of a wafer. The deep trench capacitor is deposited in the scribe line region and has a buried plate. A rectangular word line is deposited in the scribe line and covers a portion of the deep trench capacitor, and two passing word lines are deposited above the deep trench. A first doping region and a second doping region are deposited between the rectangular word line and the first passing word line and between the rectangular word line and the second passing word line respectively. A first plug, a second plug and a third plugs are coupled to the first doping region, the second doping region and the buried plate respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.