Structure and method for eliminating time dependent dielectric breakdown failure of low-k material
US6825561B1 · kind B1 · utility
6Cited by
17References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 19, 2003 |
| Grant date | Nov 30, 2004 |
| Priority date | — |
| Expiry date | Jun 19, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An interconnect structure for a semiconductor device includes a metallization line formed within a low-k dielectric material, the metallization line being surrounded on bottom and side surfaces thereof by a liner material. An embedded dielectric cap is formed over a top surface of the metallization line, wherein the embedded dielectric cap has a sufficient thickness so as to separate a top surface of the liner material from a hardmask layer formed over the low-k dielectric material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.