Face-to-face multi-chip flip-chip package
US6825567B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 19, 2003 |
| Grant date | Nov 30, 2004 |
| Priority date | — |
| Expiry date | Aug 19, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15311
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A face-to-face multi-chip flip-chip package includes a first chip, at least a second chip and a package substrate. The package substrate has a top surface, a bottom surface and a concave wall between the top surface and the bottom surface. The second chip is flip-chip mounted on active surface of the first chip. The first chip is mounted on the package substrate so that the second chip is placed inside a chip accommodation space of the package substrate which is defined by the concave wall. A side surface of the second chip is a progressive distance from the chip accommodation space for lessening capillary flow of underfilling material between the concave wall of the package substrate and the side surface of the second chip during dispensing the underfilling material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.