Testing board for semiconductor memory, method of testing semiconductor memory and method of manufacturing semiconductor memory
US6826720B2 · kind B2 · utility
6Cited by
7References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 28, 2001 |
| Grant date | Nov 30, 2004 |
| Priority date | — |
| Expiry date | Feb 21, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A testing circuit using ALPG is mounted in a testing board in which sockets for mounting semiconductor memories as devices to be tested in the board is mounted and a volatile memory for storing a data table for generating a random pattern is provided in the testing circuit so that a test using a test pattern having no regularity is performed using the data table in addition to a test using a test pattern having regularity generated by the ALPG.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.