Method for producing group III nitride compound semiconductor and group III nitride compound semiconductor device
US6830948B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 26, 2002 |
| Grant date | Dec 14, 2004 |
| Priority date | — |
| Expiry date | Oct 2, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01S2304/12
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
By using a mask 4, a first Group III nitride compound semiconductor layer 31 is etched, to thereby form an island-like structure such as a dot-like, striped-shaped, or grid-like structure, so as to provide a trench/post. Thus, without removing the mask 4 formed on a top surface of the upper layer of the post, a second Group III nitride compound layer 32 can be epitaxially grown, vertically and laterally, with a sidewall/sidewalls of the trench serving as a nucleus, to thereby bury the trench and also grow the layer in the vertical direction. The second Group III nitride compound layer 32 does not grow epitaxially on the mask 4. In this case, propagation of threading dislocations contained in the first Group III nitride compound semiconductor layer 31 can be prevented in the upper portion of the second Group III nitride compound semiconductor 32 that is formed through lateral epitaxial growth and a region having less threading dislocations can be formed in the buried portion of the trench.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.