Electro-optical analysis of integrated circuits
US6833716B1 · kind B1 · utility
5Cited by
3References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 29, 2002 |
| Grant date | Dec 21, 2004 |
| Priority date | — |
| Expiry date | Dec 17, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R1/071
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An integrated circuit die having silicon on insulator (SOI) structure is analyzed in a manner that improves the ability to obtain a signal from the SOI structure. According to one example embodiment, a stimulating device is adapted to stimulate an integrated circuit having SOI structure. An electro-optic probe arrangement is focused on a selected portion of the integrated circuit in a manner that makes possible the detection of a response to the stimulation from the SOI selected portion. In this manner electro-optic probing portions of an integrated circuit having SOI structure is enhanced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.