Method and apparatus for reordering packet transactions within a peripheral interface circuit
US6834314B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 7, 2002 |
| Grant date | Dec 21, 2004 |
| Priority date | — |
| Expiry date | Jan 15, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/128
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus for reordering packet transactions within a peripheral interface circuit. The apparatus includes a source tagging unit and a control unit. The source tagging unit may be configured to generate a plurality of tag values each corresponding to one of a plurality of packet commands. The control unit may include a first storage unit including a first plurality of locations and a second storage unit including a second plurality of locations. Each of the locations corresponds to one of the plurality of tag values. Each of the first plurality of locations may provide an indication of whether a given tag value corresponds to a first packet command in a given data stream. A first given location of the second plurality of locations corresponds to the tag value indicated by the first storage unit and stores a tag value of a second packet command in the given data stream.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.