Apparatus and method for discovering a scratch pad memory configuration
US6836833B1 · kind B1 · utility
25Cited by
5References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 22, 2002 |
| Grant date | Dec 28, 2004 |
| Priority date | — |
| Expiry date | Jun 13, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0684
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The invention includes a method of debugging an embedded processor. Scratch pad memory of an embedded processor is accessed to form a configuration file characterizing the configurations of scratch pad regions of the scratch pad memory. The embedded processor is debugged using information from the configuration file. The invention also includes an embedded processor with a processor core and scratch pad memory connected to the processor core. The scratch pad memory includes a set of scratch pad regions. The scratch pad memory stores values characterizing base addresses and region size values of the set of scratch pad regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.