Semiconductor integrated circuit device
US6847093B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 25, 2003 |
| Grant date | Jan 25, 2005 |
| Priority date | — |
| Expiry date | Jul 16, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor integrated circuit device is formed by a semiconductor substrate having an SiGe layer and a first Si layer epitaxially grown thereover, and on which there are element formation regions each partitioned by element isolation regions; a shallow groove isolation, which has a groove formed in each of the element isolation regions and an insulating film inside of the groove, said groove penetrating through the first Si layer and having a bottom in the SiGe layer; a second Si layer formed between the shallow groove isolation and the SiGe layer; and a semiconductor element formed over the main surface of the semiconductor substrate in the element formation regions. This construction enables a reduction in leakage current via the walls of the shallow groove isolation of the strained substrate, thereby improving the element isolation properties.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.