Patent · US Expired

Method for forming standard voltage threshold and low voltage threshold MOSFET devices

US6849492B2 · kind B2 · utility

6Cited by
11References
21Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJul 8, 2002
Grant dateFeb 1, 2005
Priority date
Expiry dateFeb 19, 2023

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D30/601

Abstract

Wells are formed in a substrate where standard Vt and low Vt devices of both a first and second type are to be fabricated. Wells defining the locations of first type standard Vt devices are masked, and a first voltage threshold implant adjustment is performed within wells defining the second type standard Vt devices, and each of the first and second type low Vt devices. Wells that define the locations of second type standard Vt devices are masked, and a second voltage threshold implant adjustment is performed to the wells defining the first type standard Vt devices, and each of the first and second type low Vt devices. Doped polysilicon gate stacks are then formed over the wells. Performance characteristics and control of each device Vt is controlled by regulating at least one of the first and second voltage threshold implant adjustments, and the polysilicon gate stack doping.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.