Semiconductor process for disposable sidewall spacers
US6849515B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 25, 2003 |
| Grant date | Feb 1, 2005 |
| Priority date | — |
| Expiry date | Sep 25, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/021
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor process and structure (32) uses a disposable sidewall spacer (42) associated with lightly doped drain (LDD) transistors. The disposable sidewall spacers are efficiently removed by a gaseous fluorine ambient. Either molecular or atomic fluorine gas is used to remove a silicon germanium sidewall spacer with high selectivity to exposed insulating layers. This etch process is also isotropic. An additional benefit of using a gaseous fluorine ambient is incorporation of fluorine in isolation regions (48) surrounding the transistors, thereby reducing the dielectric constant. Improved insulating properties of the isolations regions can allow increased integration.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.