Semiconductor memory device with reduced current consumption during standby state
US6850454B2 · kind B2 · utility
26Cited by
4References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 25, 2003 |
| Grant date | Feb 1, 2005 |
| Priority date | — |
| Expiry date | Jul 25, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/2227
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Data indicating whether a short-circuit defect exists in a memory block is programmed a fuse program circuit. In accordance with the fuse program data and a mode instruction signal, the correspondence relationship between a block select signal and a corresponding bit line isolation instruction signal is switched by a circuit that generates the bit line isolation instruction signal in a specific mode. It becomes possible to isolate the memory block in which a leakage current path exists from a corresponding sense amplifier band in a specific operation mode. Current consumption at least at a standby state is reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.