MRAM sense layer area control
US6852550B2 · kind B2 · utility
205Cited by
2References
38Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 14, 2003 |
| Grant date | Feb 8, 2005 |
| Priority date | — |
| Expiry date | Jul 14, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/10
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
This invention relates to MRAM technology and new MRAM memory element designs. Specifically, this invention relates to the use of ferromagnetic layers of different sizes in an MRAM element. This reduces magnetic coupling between a pinned layer and a sense layer and provides a more effective memory element. In addition, the design of the present invention reduces the instances of electrical shorts occurring between the ferromagnetic layers in an MRAM element
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.