Methods of fabricating semiconductor structures comprising epitaxial Hf3Si2 layers
US6852588B1 · kind B1 · utility
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43Claims
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Key dates
| Filing date | Jun 30, 2004 |
| Grant date | Feb 8, 2005 |
| Priority date | — |
| Expiry date | Jun 30, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/28518
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods are provided for fabricating semiconductor structures and semiconductor device structures utilizing epitaxial Hf3Si2 layers. A process in accordance with one embodiment of the invention begins by disposing a silicon substrate in a processing chamber. The pressure within the processing chamber and a temperature of the silicon substrate in the range of approximately 250° C. to approximately 700° C. is established. A layer of Hf3Si2 then is grown overlying the silicon substrate at a rate in the range of about one (1) to about five (5) monolayers per minute.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.