Non-stick detection method and mechanism for array molded laminate packages
US6853202B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 23, 2002 |
| Grant date | Feb 8, 2005 |
| Priority date | — |
| Expiry date | Feb 6, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present invention relate to a method and mechanism for testing wire bonds in an integrated circuit package. The method comprises bonding an integrated circuit silicon die to a package substrate. Next, wire connections are formed between pads in the integrated circuit silicon die and contact leads in the package substrate and testing each of the wire connections in order to detect non-stick failures using electrical continuity provided by the integrated circuit silicon die substrate. Electrical continuity is provided through dedicated pads in the package substrate that contact the underside of the silicon die substrate. The dedicated contact pads in each package substrate of the molded laminate array are connected to each other and to the mold gate. The continuity thus provided allows a non-stick-on-pad test by ensuring continuity between the wire spool through the die to the mold gate. Non-stick-on-lead check then looks for an open circuit between the wire spool and the mold gate which indicates a successful wire bond to the lead and associated separation from the wire feed capillary. The IC contact pads and leads in the package substrate are electrically isolate…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.