Method and apparatus for forming a cavity in a semiconductor substrate using a charged particle beam
US6855622B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 30, 2002 |
| Grant date | Feb 15, 2005 |
| Priority date | — |
| Expiry date | Dec 24, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/26506
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Apparatus and method for exposing a selected feature of an integrated circuit device such as a selected portion of the metallization layer, from the backside of the integrated circuit substrate without disturbing adjacent features of the device such as the active semiconductor regions. This is performed using an FIB (focused ion beam) etching process in conjunction with observation by an optical microscope to form a trench through the substrate. The floor of the trench is formed so as to be as smooth and planar as possible, thereby preventing undesirable exposure of the underlying active regions through any unknown or undesired cavity caused by scratches or pits or a deeper than desired sidewall. The smoothness and planarity of the floor of the trench is established by, prior to forming the trench, removing any surface defect initially present by using an FIB etching without use of assist gas to eliminate most scratches or impurities on the surface of the silicon, followed by removal of implanted ions using a gas-injected assisted FIB etch. Then the actual trench is formed using an assisted etch using a more aggressive injected gas.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.