Comparator circuit for semiconductor test system
US6856158B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 1, 2002 |
| Grant date | Feb 15, 2005 |
| Priority date | — |
| Expiry date | Jul 19, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31932
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A comparator circuit for use in a semiconductor test system for comparing differential output signals of a semiconductor device under test (DUT). The comparator circuit is formed of a first pair of comparators having a DC comparator and an AC comparator which receives a first differential signal, a second pair of comparators having a DC comparator and an AC comparator which receives a second differential signal, a first latch for latching output of the first pair of comparators, a second latch for latching output of the second pair of comparators, and first and second serial-parallel converters for converting output signals of the first and second latches into parallel signals. The comparator circuit is formed of discrete components on a dielectric substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.