Source side self boosting technique for non-volatile memory
US6859397B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 5, 2003 |
| Grant date | Feb 22, 2005 |
| Priority date | — |
| Expiry date | Apr 5, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/3454
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile semiconductor memory system (or other type of memory system) is programmed in a manner that avoids program disturb. In one embodiment that includes a flash memory system using a NAND architecture, program disturb is avoided by increasing the channel potential of the source side of the NAND string during the programming process. One exemplar implementation includes applying a voltage (e.g. Vdd) to the source contact and turning on the source side select transistor for the NAND sting corresponding to the cell being inhibited. Another implementation includes applying a pre-charging voltage to the unselected word lines of the NAND string corresponding to the cell being inhibited prior to applying the program voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.