Patent · US Expired

Dynamic RAM semiconductor memory and method for operating the memory

US6859406B2 · kind B2 · utility

1Cited by

5References

6Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Manfred Proll · Dorfen, DE
Stephan Schröder · Birkenfeld, DE
Claus Engelhardt · Birkenfeld, DE
Jorg Kliewer · Birkenfeld, DE

Key dates

Filing date	Dec 1, 2003
Grant date	Feb 22, 2005
Priority date	—
Expiry date	Dec 1, 2023

Classification

Technology area (CPC G)Physics
CPC primaryG11C11/4094
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A dynamic RAM semiconductor memory with a shared sense amplifier organization concept, in which the cell arrays are subdivided into blocks whose bit lines are connected in pairs from two adjacent blocks in each case to a common sense amplifier and the sense amplifiers are disposed between the cell blocks. In which case bit line switches are disposed in sense amplifier strips—lying between the blocks—between in each case two adjacent sense amplifiers in order to momentarily connect the other ends—not connected to the sense amplifiers—of two bit line pairs from the adjacent cell blocks during a precharge phase of a bit line pair activated directly beforehand. The precharge phase takes place at the start of a charge equalization phase.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.