Patent · US Expired

Address counter for addressing synchronous high-frequency digital circuits, in particular memory devices

US6862702B2 · kind B2 · utility

1Cited by

2References

10Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Wolfgang Ernst · Munich, DE
Gunnar Krause · Munich, DE
Justus Kuhn · Birkenfeld, DE
Jens Lüpke · Hersbruck, DE
Jochen Müller · Hersbruck, DE
Peter Pöchmüller · Birkenfeld, DE
Michael Schittenhelm · Poing, DE

Key dates

Filing date	Jul 18, 2001
Grant date	Mar 1, 2005
Priority date	—
Expiry date	Jan 24, 2023

Classification

Technology area (CPC G)Physics
CPC primaryG11C29/56
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

The novel address counter can be used in combination with an existing test unit—serving for testing digital circuits—for addressing synchronous high-frequency digital circuits, in particular fast memory devices. Address offset values are provided in programmable offset registers, with a multiplexer circuit and a selection and combination circuit, on the basis of input signals which are fed in at low frequency and in parallel by the test unit. Simple address changes and address jumps can be realized at a high clock frequency in a very flexible manner.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.