Configuration and method for making contact with the back surface of a semiconductor substrate
US6863769B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 12, 2003 |
| Grant date | Mar 8, 2005 |
| Priority date | — |
| Expiry date | Sep 12, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A base body is provided, on which a first sealing ring and a second sealing ring are disposed. A substrate is disposed on the sealing rings in such a way that a cavity is formed between the first sealing ring, the second sealing ring, the base body and the substrate. An etching substance can be introduced into the cavity in order to etch clear a conductive layer that has been applied to the substrate. When a conductive layer that has been applied to the substrate back surface has been uncovered, an electrolyte can be introduced into the cavity, making contact with the conductive layer and therefore the substrate back surface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.