Method of forming shallow trench isolation using deep trench isolation
US6864151B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 9, 2003 |
| Grant date | Mar 8, 2005 |
| Priority date | — |
| Expiry date | Jul 9, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76229
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of isolating active areas of a semiconductor workpiece. Deep trenches are formed in a workpiece between adjacent first active areas, and an insulating layer and a semiconductive material are deposited in the deep trenches. The semiconductive material is recessed below a top surface of the workpiece. Shallow trenches are formed in the workpiece between adjacent second active areas, and an insulating material is deposited in the shallow trenches and in the semiconductive material recess. The deep trenches may also be formed between an adjacent first active area and second active area. The first active areas may be high voltage devices, and the second active areas may be low voltage devices. The shallow trench isolation over the recessed semiconductive material in the deep trenches is self-aligned.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.