Method for fabricating integrated circuit arrangements, and associated circuit arrangements, in particular tunnel contact elements
US6864175B2 · kind B2 · utility
5Cited by
5References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 20, 2001 |
| Grant date | Mar 8, 2005 |
| Priority date | — |
| Expiry date | Feb 26, 2023 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T428/12438
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention relates to a method in which an eclectically nonconductive mask layer is applied to an electrically conductive contact layer which is supported by a substrate layer. A free space is made in the mask layer. Then, a plurality of layers are electrochemically deposited in the free space. Then, layers are applied above the layer which was deposited last. Then, in a removal process, the mask layer is removed down to the height of the top layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.