Method and system for logic verification using mirror interface

US6865502B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Robert J. Devins · South Burlington, US
• Paul Ferro · South Burlington, US
• Peter Dean LaFauci · Holly Springs, US
• Kenneth A. Mahler · Cincinnati, US
• David W. Milton · Underhill, US

Key dates

• Filing date: Apr 4, 2001
• Grant date: Mar 8, 2005
• Expiry date: Dec 5, 2021

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F30/33
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

Verification of external interfaces of cores on system-on-chip (SOC) designs frequently entails the purchase of costly standardized software models to test the external interfaces. Typically, the standardized models provide more functionality than is needed. Instead of standardized models, test models may be developed and utilized, but this also incurs cost and delay. The present invention provides an efficient and economical alternative. A mirror interface, or copy of the external interface undergoing verification, is used with a standardized control mechanism to verify the external interface. Because all interface I/O connections can thereby be utilized, a cost-effective and highly reusable way of verifying such interfaces is provided.