Peter Dean LaFauci
12Patents
8h-index
16Co-inventors
61Inventor score
Filing activity: May 4, 1999 → Oct 31, 2007
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6772254B2 | Multi-master computer system with overlapped read and write operations and scalable address pipelining | Physics | 32 | Expired |
| US6587905B1 | Dynamic data bus allocation | Physics | 30 | Expired |
| US6513089B1 | Dual burst latency timers for overlapped read and write data transfers | Physics | 29 | Expired |
| US6718521B1 | Method and system for measuring and reporting test coverage of logic designs | Physics | 17 | Expired |
| US6829731B1 | Method and system for generating a design-specific test case from a generalized set of bus transactions | Physics | 17 | Expired |
| US6970816B1 | Method and system for efficiently generating parameterized bus transactions | Physics | 10 | Expired |
| US6430641B1 | Methods, arbiters, and computer program products that can improve the performance of a pipelined dual bus data processing system | Physics | 9 | Expired |
| US6865502B2 | Method and system for logic verification using mirror interface | Physics | 9 | Expired |
| US6507808B1 | Hardware logic verification data transfer checking apparatus and method therefor | Physics | 7 | Expired |
| US7353131B2 | Method and system for logic verification using mirror interface | Physics | 4 | Expired |
| US7729877B2 | Method and system for logic verification using mirror interface | Physics | 2 | Active |
| US6684277B2 | Bus transaction verification method | Physics | 1 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.