Method and device for reading and for checking the time position of data response signals read out from a memory module to be tested

US6871306B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Wolfgang Ernst · Munich, DE
• Gunnar Krause · Munich, DE
• Justus Kuhn · Birkenfeld, DE
• Jens Lüpke · Hersbruck, DE
• Jochen Müller · Hersbruck, DE
• Peter Pöchmüller · Birkenfeld, DE
• Michael Schittenhelm · Poing, DE

Key dates

• Filing date: Jul 18, 2001
• Grant date: Mar 22, 2005
• Expiry date: Dec 29, 2022

Classification

• Technology area (CPC G): Physics
• CPC primary: G11C29/56
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

A method and a device for reading and for checking the time position of a data response read out from a memory module to be tested, in particular a DRAM memory operating in DDR operation. In a test receiver, the data response from the memory module to be tested is latched into a data latch with a data strobe response signal that has been delayed. A symmetrical clock signal is generated as a calibration signal. The calibration signal is used to calibrate the time position of the delayed data strobe response signal with respect to the data response. The delayed data strobe response signal is used for latching the data response. The delay time is programmed into a delay device during the calibration operation and also supplies a measure for testing precise time relationships between the data strobe response signal (DQS) and the data response.