Floating gate and fabricating method thereof

US6872623B2 · kind B2 · utility

Assignee

• NANYA TECHNOLOGY CORPORATION · TW

Inventors

• Ying-Cheng Chuang · Taoyuan, TW
• Chung-Lin Huang · Taichung, TW
• Chi-Hui Lin · Taipei, TW

Key dates

• Filing date: Mar 24, 2003
• Grant date: Mar 29, 2005
• Expiry date: Mar 24, 2023

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/035

Abstract

A floating gate and fabrication method thereof. A semiconductor substrate is provided, on which an oxide layer, a first conducting layer, and a patterned hard mask layer having an opening are sequentially formed. A spacer is formed on the sidewall of the opening. A second conducting layer is formed on the hard mask layer. The second conducting layer is planarized to expose the surface of the patterned hard mask layer. The surface of the second conducting layer is oxidized to form an oxide layer. The patterned hard mask layer and the oxide layer and the first conducting layer underlying the patterned hard mask layer are removed.