Semiconductor circuit device adaptable to plurality of types of packages
US6873563B2 · kind B2 · utility
28Cited by
1References
7Claims
0Family size
Assignee
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Key dates
| Filing date | Mar 19, 2003 |
| Grant date | Mar 29, 2005 |
| Priority date | — |
| Expiry date | Mar 19, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/13091
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Data pad regions are arranged in four divided regions of a semiconductor memory chip of a rectangular shape, respectively, and data pads are selectively utilized in each of the four divided regions in accordance with a word structure. Thus, it is possible to implement a semiconductor memory chip capable of being assembled in both a single chip package and a multi chip package.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.