Substrate processing method and substrate processing apparatus
US6875466B2 · kind B2 · utility
10Cited by
9References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 21, 2002 |
| Grant date | Apr 5, 2005 |
| Priority date | — |
| Expiry date | Jan 8, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/67751
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The wafer coated with the resist is deliberately placed in the vapor before being transferred to an aligner that exposes the resist on the wafer, the vapor, for example, the moisture, uniformly adheres onto the resist on the wafer. As a result, the substrate can uniformly be exposed in the following exposing process, and the uniformity of the line width and the like can be improved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.