Patent · US Expired

Method for testing semiconductor circuit devices

US6876217B2 · kind B2 · utility

2Cited by

4References

38Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Stefan Dankowski · Hersbruck, DE
Alexander Benedix · Hersbruck, DE
Reinhard Düregger · Poing, DE
Wolfgang Ruf · Friedberg, DE

Key dates

Filing date	Oct 15, 2002
Grant date	Apr 5, 2005
Priority date	—
Expiry date	Dec 13, 2022

Classification

Technology area (CPC G)Physics
CPC primaryG11C2029/2602
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

To be able to test a plurality of identical semiconductor circuit devices in a particularly rapid yet reliable manner, a test method includes carrying out the tests in parallel and substantially simultaneously on the plurality of semiconductor circuit devices and driver lines—used in the process—of a test device to the semiconductor circuit devices simultaneously and jointly for all the semiconductor circuit devices. In such a case, test results are read from a plurality of input/output channels in compressed form. Furthermore, as an alternative or in addition thereto, the semiconductor circuit devices to be tested are disposed and connected up in at least one stack.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.