Integrated circuit heating system and method therefor
US6879172B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 2, 2000 |
| Grant date | Apr 12, 2005 |
| Priority date | — |
| Expiry date | Jul 9, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2877
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Semiconductor die analysis is enhanced via a method and system that use a heater having a plurality of heating elements to heat a selected portion of the die. According to an example embodiment of the present invention, the heater is thermally coupled to the die, and the die is operated while at least one of the plurality of heating elements heats a portion of the die. A response is detected and used to analyze the die. The present invention makes possible selective heating of the die in a manner that is readily controllable and implemented. Die analysis, including, for example, critical timing path analysis, is enhanced by this ability to controllably heat the die.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.