Methods for contacting conducting layers overlying magnetoelectronic elements of MRAM devices

US6881351B2 · kind B2 · utility

Assignee

• Freeescale Semiconductor, Inc. · US

Inventors

• Gregory W. Grynkewich · Gilbert, US
• Brian R. Butcher · Gilbert, US
• Mark Durlam · Chandler, US
• Kelly Kyler · Mesa, US
• Charles A. Synder · Gilbert, US
• Kenneth Smith · Chandler, US
• Clarence J. Tracy · Tempe, US
• Richard Williams · Chandler, US

Key dates

• Filing date: Apr 22, 2003
• Grant date: Apr 19, 2005
• Expiry date: Jun 24, 2023

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10N50/01
• WIPO field: Micro-structural and nano-technology
• WIPO sector: Chemistry

Abstract

A method for contacting an electrically conductive layer overlying a magnetoelectronics element includes forming a memory element layer overlying a dielectric region. A first electrically conductive layer is deposited overlying the memory element layer. A first dielectric layer is deposited overlying the first electrically conductive layer and is patterned and etched to form a first masking layer. Using the first masking layer, the first electrically conductive layer is etched. A second dielectric layer is deposited overlying the first masking layer and the dielectric region. A portion of the second dielectric layer is removed to expose the first masking layer. The second dielectric layer and the first masking layer are subjected to an etching chemistry such that the first masking layer is etched at a faster rate than the second dielectric layer. The etching exposes the first electrically conductive layer.