Apparatus for reordering graphics responses in a peripheral interface circuit for an I/O node of a computer system
US6883045B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 7, 2002 |
| Grant date | Apr 19, 2005 |
| Priority date | — |
| Expiry date | Jan 15, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/128
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus for reordering graphics responses in a peripheral interface circuit for an I/O node of a computer system. The apparatus includes a data buffer and a control unit. The data buffer includes a first plurality of storage locations each corresponding to one of a plurality of tag values. The data buffer may receive a plurality of data packets associated with the graphics transactions. The data buffer may also store the data packets in the storage locations according to tag values. The control unit includes a storage unit having a second plurality of locations. Each of the locations in the storage unit corresponds to one of the tag values and may provide an indication of whether a given data packet has been stored in the data buffer. The control unit may further determine an order in which the plurality of data packets is read from the data buffer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.