Method and system for generating a circuit design including a peripheral component connected to a bus
US6883147B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 25, 2002 |
| Grant date | Apr 19, 2005 |
| Priority date | — |
| Expiry date | Apr 6, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Method and system for generating an electronic circuit design. A first logic block is instantiated in the design in response to user input controls. The first logic block includes parameters that specify its interface requirements. Bus interface blocks, which are parameterizable to connect a logic block to a bus, are provided in a library. Bus interface blocks that connect the first logic block to the bus are instantiated in the design, and the bus interface blocks are parameterized in response to the requirements of, the first logic block. The bus interface blocks are connected to the first logic block in such a way that the first logic block is extended into a peripheral that can communicate with the bus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.