Method of fabricating posts over integrated heat sink metallization to enable flip chip packaging of GaAs devices
US6884661B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 4, 2003 |
| Grant date | Apr 26, 2005 |
| Priority date | — |
| Expiry date | Nov 4, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention provides for attaching a Gallium Arsenide (GaAs) semiconductor die to a package using bumps formed over a metallic heat sink covering the output transistor area of the semiconductor die. In general, one or more bumps are formed on the metallic heat sink, thereby eliminating stress on the bumps caused by stress risers on the surface of the semiconductor die. In addition, the upper and lower surfaces of the bumps are substantially planar, thereby maximizing contact with the semiconductor die and the package and allowing maximum heat transfer. The planarization is due to the conforming contact surface of the solder. The combination of the bumps and the metallic heat sink provide an efficient way to reduce the thermal and electrical impedance of the die. In one embodiment, the bumps are substantially copper. In another embodiment, the bumps are substantially gold.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.