Differential sense amplifier for multilevel non-volatile memory
US6885600B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 10, 2002 |
| Grant date | Apr 26, 2005 |
| Priority date | — |
| Expiry date | Jan 5, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/06
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A digital multilevel non-volatile memory includes a massive sensing system that includes a plurality of sense amplifiers disposed adjacent subarrays of memory cells. The sense amplifier includes a high speed load, a wide output range intermediate stage and a low impedance output driver. The high speed load provides high speed sensing. The wide output range provides a sensing margin at high speed on the comparison node. The low impedance output driver drives a heavy noisy load of a differential comparator. A precharge circuit coupled to the input and output of the sense amplifier increases the speed of sensing. A differential comparator has an architecture that includes analog bootstrap. A reference sense amplifier has the same architecture as the differential amplifier to reduce errors in offset. The reference differential amplifier also includes a signal multiplexing for detecting the contents of redundant cells and reference cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.