Interconnect arrangement and method for fabricating an interconnect arrangement

US6888244B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Manfred Engelhardt · Feldkirchen-Westerham, DE
• Guenther Schindler · Hersbruck, DE

Key dates

• Filing date: Mar 1, 2002
• Grant date: May 3, 2005
• Expiry date: Mar 1, 2022

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/0002
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

An interconnect arrangement (100) has a first layer (101), a first layer surface (102), thereon at least two interconnects (104) having a second layer surface (105) essentially parallel to the first layer surface (102), thereon a respective second layer (106) for each interconnect (104), the second layers (106) of adjacent interconnects covering regions between the adjacent interconnects (104), and thereon a third layer (107), which completely closes off the regions between the adjacent interconnects (104) by means of coverage.