Method and apparatus for entering and exiting multiple threads within a multithreaded processor
US6889319B1 · kind B1 · utility
84Cited by
30References
33Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 9, 1999 |
| Grant date | May 3, 2005 |
| Priority date | — |
| Expiry date | Dec 9, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3888
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method includes maintaining a state machine to provide a multi-bit output, each bit of the multi-bit output indicating a respective status for an associated thread of multiple threads being executed within a multithreaded processor. Status for a first thread is detected, responsive to which a functional unit within the multithreaded processor is configured in accordance with the multi-bit output of the state machine.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.