Dual-solder flip-chip solder bump
US6893799B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 6, 2003 |
| Grant date | May 17, 2005 |
| Priority date | — |
| Expiry date | Apr 17, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/351
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method to effectively deposit multi-component solders while remaining compatible with electroplating solder bumping process. A flip-chip solder bump is formed by using electroplated solder bump technology with the addition of wettable layer of metal or solder. The remainder of the required solder volume is deposited by Injection Molded Solder (IMS) technology. This method will accommodate certain metals, as well as trace amounts of alloying, that would be difficult or impossible to electroplate. The method also allows for electrical test between deposition of the wettable layer of solder and the bulk solder, providing the advantages of a more planar surface for probe contact, with very consistent height, less solder pick-up by the test probe and elimination of the post-probe solder reflow step.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.