Capacitor in an interconnect system and method of manufacturing thereof
US6894364B2 · kind B2 · utility
7Cited by
5References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 24, 2003 |
| Grant date | May 17, 2005 |
| Priority date | — |
| Expiry date | Feb 24, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A fabrication method for an integrated device having a capacitor in an interconnect system is described. At least a first exposed metal line and a second metal line are provided in an insulating layer. A stack layer is deposited and patterned to form a film stack structure over the second metal line. An inter-metal dielectric layer is formed over the film stack structure, the first metal line and the insulating layer. At least a first dual damascene interconnect and a second dual damascene interconnect are formed over and in contact with the first metal line and the film stack structure, respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.