Packaged stacked semiconductor die and method of preparing same
US6894380B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 28, 2002 |
| Grant date | May 17, 2005 |
| Priority date | — |
| Expiry date | Apr 7, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of packaging semiconductor devices is described. In one embodiment, the method comprises providing a section of wafer mount tape, applying an adhesive layer to the wafer mount tape, stretching the wafer mount tape and the adhesive layer, attaching a wafer to the stretched adhesive layer, cutting the wafer and the adhesive layer, the wafer being cut into a plurality of die, and curing the wafer mount tape. In further embodiments, the method comprises removing at least one of the plurality of die from the wafer mount tape, the removed die having a portion of the adhesive layer coupled thereto, providing a die having a plurality of wire bonds coupled thereto, and coupling the adhesive layer on the removed die to the die having the wire bonds coupled thereto. In another aspect, the present invention is directed to a plurality of stacked semiconductor devices that comprise a first die, the first die having an upper surface, a second die positioned above the first die, the second die having a bottom surface, and an adhesive layer positioned between and coupled to each of the first die and the second die, the adhesive layer comprised of first and second surfaces, the first surfac…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.